Camintonn CMV-1000

1MB/512kW dynamic Qbus RAM board

Mfg date Q4 1984
Serial # 2368

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The switches and jumpers on this board seem identical to those of an
MSV11-QA, Etch Revision A board.  The setup is described in chapter 2 
of the MSV11-Q MOS Memory User's Guide (EK-MSV1Q-UG-002).
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The memory can be located at any 128k byte boundary between 0 and 4MB.
The CSR can ge located at 16 different addresses from 172100 to 172136. 

128k byte addresses consume 2^10 (1024) + 2^7 (127), or 17 address bits.
Since this is a 22-bit address board, there are 22-17 = 5 bits that must
be used to determine the boundary address.

There are two 6-bit DIP switches SW1 and SW2.  On the board I purchased
SW1[6:1] = 000001 and SW2[6:1] = 000110 (0 = off, 1 = on).

For CSR addresses, the address bits [22:13] are decoded into the BBS7
signal, so address bits [12:0] must be the ones that select the CSR
addresses.  Since the CSR is typically 16-bits, the 16 address choices
are:

172100  172102  172104  172106
172110  172112  172114  172116
172120  172122  172124  172126
172130  172132  172134  172136

We would need 4 switches or some kind of complex jumper scheme to 
to select these 1 of these 16 addresses.

In the "features" section of the brochure, it clearly says that the
starting address is "switch selectable", while the CSR address is
"jumper selectable", so I'm guessing that the cluster of jumpers is
for the CSR address selection.

We might look at the MSV11-QA (M7551-BA) DEC memory board (1MB, quad)
documentation to see what features are available, since I'm guessing that
the Camintonn board is made as a alternative to the DEC board.  The feature
list of the MXV11-QA board looks very much like the featurse list of the
CMV-1000 board.

The DEC board also has two 6-bit DIP switches - SW1[5:1] are used to select
the starting address and SW2[6:1] are used to select the ending address.
It also has various sets of jumpers


There are 4 individual jumpers and 1 cluster of jumpers:

M-N-P-R 	select the CSR register address
A-B 		enable/disable CSR selection
W1-W2		enable/disable block mode
K-L 		enable/disable extended error address
J-H 		enable parity error detection

The jumpers on the Camintonn board have the same labels, so I'm going to 
make a SWAG that they are defined the same way.  Here is the description of
the function of the switches and jumpers, according to the MXV11-QA manual:

M-N-P-R:

An inserted jumper inidicates an address bit of 0, while a removed jumper 
indicates an address bit of 1.  Jumper R is the least significant address
bit.  All jumpers installed therefore select the CSR address of 172100,
which is the configuration of the CMV-1000 as I received it.

A-B:

When A is not connected to B, the CSR is not accessible, but this is only 
proper if the memory does not include parity.  Since this board does have
parity error checking, jumper B should be connected, but it does not look
like this CMV-1000 board is set that way... it is set to have B connected to
A, while the diagram in the DEC manual shows B connected to the un-named
pin as the factory configuration to enable the CSR.

W1-W2:

W1 connected to the center pin enables block mode, and that is how the 
CMV-1000 board is set.

K-L:

To select 22-bit addressing, the L jumper should be connected to the center
pin, while connecting the K jumper to the center pin selects 18-bit 
addressing.  The CMV-1000 board is set to enable 22-bit (extended) addressing.

J-H: 

With H connected to the center pin, parity error detection is enabled.  The
CMV-1000 board looks like J is connected to the center pin, so that parity
error detection is not enalbed.  This is consistent with the CSR being disabled
via the A-B jumper.

*** I am going to change the A-B jumpers so that the CSR is enabled and the J-H
*** jumpers so that parity error detection is enabled.  If this doesn't work
*** I can switch them back.

To set the starting address to 0, SW1[5:1] = 00000, SW2[6] = 0, and 
SW2[5:1] = 11111.  The settings on the CMV-1000 board as I received it shows:

SW1[5:1] = 00000, SW2[6] = 0, SW2[5:1] = 11000

This setting looks correct for a 1MB memory located at address 0.