Marion Kenefick
(408) 354-1183
New Low-End of FMI's Submicron ASIC Families
Power consumption, at 4mW/gate, is more than 30 percent lower than in Fujitsu's 0.8 micron CMOS ASIC product families, according to Barry Marsh, director of ASIC marketing for FMI. Overall performance of the CG46 0.65 micron family will be significantly higher for designs using between 24,000 and 73,000 gates.
Average gate utilization is approximately 45 percent. I/O pads range from 208 to 400. The companion CE46 is an embedded array family that supplies complete support of diffused high-speed RAMs and ROMs. Chip-to-chip clock synchronization is managed by internal phase locked loops.
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FOR FURTHER INFORMATION:
Betsy Taub
Fujitsu Microelectronics, Inc.
(408) 922-9440
Dick Davies
Independent Public Relations Assoc.
(415) 777-4161